| Submitter | Hauke Mehrtens |
|---|---|
| Date | 2010-02-20 06:02:20 |
| Message ID | <1266691880-372-1-git-send-email-hauke@hauke-m.de> |
| Download | mbox | patch |
| Permalink | /patch/981/ |
| State | Accepted |
| Delegated to: | Ralf Baechle |
| Headers | show |
Comments
On Sat, Feb 20, 2010 at 07:51:20PM +0100, Hauke Mehrtens wrote: > Ignoring the last page when ddr size is 128M. Cached > accesses to last page is causing the processor to prefetch > using address above 128M stepping out of the ddr address > space. Is this a hardware issue prefetching issue? The kernel should not try CPU prefetch instructions at all on non-coherent CPUs such as the BCM47xx. Ralf
Ralf Baechle wrote: > On Sat, Feb 20, 2010 at 07:51:20PM +0100, Hauke Mehrtens wrote: > >> Ignoring the last page when ddr size is 128M. Cached >> accesses to last page is causing the processor to prefetch >> using address above 128M stepping out of the ddr address >> space. > > Is this a hardware issue prefetching issue? The kernel should not try > CPU prefetch instructions at all on non-coherent CPUs such as the > BCM47xx. This is a hardware issue on the bcm47xx when 128MB ram is present. This workaround is out of broadcom's kernel sources and is included in OpenWRT for some months. Without this patch the kernel does not even print out anything and with this patch it is working. Hauke
On Mon, Feb 22, 2010 at 09:25:11PM +0100, Hauke Mehrtens wrote: > > Is this a hardware issue prefetching issue? The kernel should not try > > CPU prefetch instructions at all on non-coherent CPUs such as the > > BCM47xx. > > This is a hardware issue on the bcm47xx when 128MB ram is present. This > workaround is out of broadcom's kernel sources and is included in > OpenWRT for some months. Without this patch the kernel does not even > print out anything and with this patch it is working. Thanks! I was asking to ensure this isn't a workaround for an already solved kernel software issue. Patch applied, Ralf
Patch
diff --git a/arch/mips/bcm47xx/prom.c b/arch/mips/bcm47xx/prom.c index 5efc995..0fa646c 100644 --- a/arch/mips/bcm47xx/prom.c +++ b/arch/mips/bcm47xx/prom.c @@ -141,6 +141,14 @@ static __init void prom_init_mem(void) break; } + /* Ignoring the last page when ddr size is 128M. Cached + * accesses to last page is causing the processor to prefetch + * using address above 128M stepping out of the ddr address + * space. + */ + if (mem == 0x8000000) + mem -= 0x1000; + add_memory_region(0, mem, BOOT_MEM_RAM); }
Ignoring the last page when ddr size is 128M. Cached accesses to last page is causing the processor to prefetch using address above 128M stepping out of the ddr address space. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> --- arch/mips/bcm47xx/prom.c | 8 ++++++++ 1 files changed, 8 insertions(+), 0 deletions(-)