Patchwork [v6,01/01] Virtual memory size detection for 64 bit MIPS CPUs

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Submitter Guenter Roeck
Date 2010-02-02 04:02:20
Message ID <1265129540-10884-2-git-send-email-guenter.roeck@ericsson.com>
Download mbox | patch
Permalink /patch/935/
State Accepted
Delegated to: Ralf Baechle
Headers show

Comments

Guenter Roeck - 2010-02-02 04:02:20
Linux kernel 2.6.32 and later allocates memory from the top of virtual memory
space.

This patch implements virtual memory size detection for 64 bit MIPS CPUs
to avoid resulting crashes.

Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
---
 arch/mips/include/asm/cpu-features.h |    7 +++++++
 arch/mips/include/asm/cpu-info.h     |    3 +++
 arch/mips/include/asm/pgtable-64.h   |    4 +++-
 arch/mips/kernel/cpu-probe.c         |   11 +++++++++++
 4 files changed, 24 insertions(+), 1 deletions(-)
David Daney - 2010-02-02 06:02:25
Guenter Roeck wrote:
> Linux kernel 2.6.32 and later allocates memory from the top of virtual memory
> space.
> 
> This patch implements virtual memory size detection for 64 bit MIPS CPUs
> to avoid resulting crashes.
> 
> Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>

Reviewed-by: David Daney <ddaney@caviumnetworks.com>


> ---
>  arch/mips/include/asm/cpu-features.h |    7 +++++++
>  arch/mips/include/asm/cpu-info.h     |    3 +++
>  arch/mips/include/asm/pgtable-64.h   |    4 +++-
>  arch/mips/kernel/cpu-probe.c         |   11 +++++++++++
>  4 files changed, 24 insertions(+), 1 deletions(-)
> 
> diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h
> index 1f4df64..e5835dd 100644
> --- a/arch/mips/include/asm/cpu-features.h
> +++ b/arch/mips/include/asm/cpu-features.h
> @@ -191,6 +191,9 @@
>  # ifndef cpu_has_64bit_addresses
>  # define cpu_has_64bit_addresses	0
>  # endif
> +# ifndef cpu_vmbits
> +# define cpu_vmbits 31
> +# endif
>  #endif
>  
>  #ifdef CONFIG_64BIT
> @@ -209,6 +212,10 @@
>  # ifndef cpu_has_64bit_addresses
>  # define cpu_has_64bit_addresses	1
>  # endif
> +# ifndef cpu_vmbits
> +# define cpu_vmbits cpu_data[0].vmbits
> +# define __NEED_VMBITS_PROBE
> +# endif
>  #endif
>  
>  #if defined(CONFIG_CPU_MIPSR2_IRQ_VI) && !defined(cpu_has_vint)
> diff --git a/arch/mips/include/asm/cpu-info.h b/arch/mips/include/asm/cpu-info.h
> index 1260443..b39def3 100644
> --- a/arch/mips/include/asm/cpu-info.h
> +++ b/arch/mips/include/asm/cpu-info.h
> @@ -58,6 +58,9 @@ struct cpuinfo_mips {
>  	struct cache_desc	tcache;	/* Tertiary/split secondary cache */
>  	int			srsets;	/* Shadow register sets */
>  	int			core;	/* physical core number */
> +#ifdef CONFIG_64BIT
> +	int			vmbits;	/* Virtual memory size in bits */
> +#endif
>  #if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_MIPS_MT_SMTC)
>  	/*
>  	 * In the MIPS MT "SMTC" model, each TC is considered
> diff --git a/arch/mips/include/asm/pgtable-64.h b/arch/mips/include/asm/pgtable-64.h
> index 9cd5089..8eda30b 100644
> --- a/arch/mips/include/asm/pgtable-64.h
> +++ b/arch/mips/include/asm/pgtable-64.h
> @@ -110,7 +110,9 @@
>  #define VMALLOC_START		MAP_BASE
>  #define VMALLOC_END	\
>  	(VMALLOC_START + \
> -	 PTRS_PER_PGD * PTRS_PER_PMD * PTRS_PER_PTE * PAGE_SIZE - (1UL << 32))
> +	 min(PTRS_PER_PGD * PTRS_PER_PMD * PTRS_PER_PTE * PAGE_SIZE, \
> +	     (1UL << cpu_vmbits)) - (1UL << 32))
> +
>  #if defined(CONFIG_MODULES) && defined(KBUILD_64BIT_SYM32) && \
>  	VMALLOC_START != CKSSEG
>  /* Load modules into 32bit-compatible segment. */
> diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
> index 7a51866..00d7124 100644
> --- a/arch/mips/kernel/cpu-probe.c
> +++ b/arch/mips/kernel/cpu-probe.c
> @@ -282,6 +282,15 @@ static inline int __cpu_has_fpu(void)
>  	return ((cpu_get_fpu_id() & 0xff00) != FPIR_IMP_NONE);
>  }
>  
> +static inline void cpu_probe_vmbits(struct cpuinfo_mips *c)
> +{
> +#ifdef __NEED_VMBITS_PROBE
> +	write_c0_entryhi(0x3ffffffffffff000ULL);
> +	back_to_back_c0_hazard();
> +	c->vmbits = fls64(read_c0_entryhi() & 0x3ffffffffffff000ULL);
> +#endif
> +}
> +
>  #define R4K_OPTS (MIPS_CPU_TLB | MIPS_CPU_4KEX | MIPS_CPU_4K_CACHE \
>  		| MIPS_CPU_COUNTER)
>  
> @@ -967,6 +976,8 @@ __cpuinit void cpu_probe(void)
>  		c->srsets = ((read_c0_srsctl() >> 26) & 0x0f) + 1;
>  	else
>  		c->srsets = 1;
> +
> +	cpu_probe_vmbits(c);
>  }
>  
>  __cpuinit void cpu_report(void)
Ralf Baechle - 2010-02-02 06:02:56
On Tue, Feb 02, 2010 at 10:29:25AM -0800, David Daney wrote:

> >Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
> 
> Reviewed-by: David Daney <ddaney@caviumnetworks.com>

Thanks for reviewing - as close as this to a release I appreciate a 2nd
pair of eyes.

Applied and will go to Linus asap.

Thanks everybody,

  Ralf

Patch

diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h
index 1f4df64..e5835dd 100644
--- a/arch/mips/include/asm/cpu-features.h
+++ b/arch/mips/include/asm/cpu-features.h
@@ -191,6 +191,9 @@ 
 # ifndef cpu_has_64bit_addresses
 # define cpu_has_64bit_addresses	0
 # endif
+# ifndef cpu_vmbits
+# define cpu_vmbits 31
+# endif
 #endif
 
 #ifdef CONFIG_64BIT
@@ -209,6 +212,10 @@ 
 # ifndef cpu_has_64bit_addresses
 # define cpu_has_64bit_addresses	1
 # endif
+# ifndef cpu_vmbits
+# define cpu_vmbits cpu_data[0].vmbits
+# define __NEED_VMBITS_PROBE
+# endif
 #endif
 
 #if defined(CONFIG_CPU_MIPSR2_IRQ_VI) && !defined(cpu_has_vint)
diff --git a/arch/mips/include/asm/cpu-info.h b/arch/mips/include/asm/cpu-info.h
index 1260443..b39def3 100644
--- a/arch/mips/include/asm/cpu-info.h
+++ b/arch/mips/include/asm/cpu-info.h
@@ -58,6 +58,9 @@  struct cpuinfo_mips {
 	struct cache_desc	tcache;	/* Tertiary/split secondary cache */
 	int			srsets;	/* Shadow register sets */
 	int			core;	/* physical core number */
+#ifdef CONFIG_64BIT
+	int			vmbits;	/* Virtual memory size in bits */
+#endif
 #if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_MIPS_MT_SMTC)
 	/*
 	 * In the MIPS MT "SMTC" model, each TC is considered
diff --git a/arch/mips/include/asm/pgtable-64.h b/arch/mips/include/asm/pgtable-64.h
index 9cd5089..8eda30b 100644
--- a/arch/mips/include/asm/pgtable-64.h
+++ b/arch/mips/include/asm/pgtable-64.h
@@ -110,7 +110,9 @@ 
 #define VMALLOC_START		MAP_BASE
 #define VMALLOC_END	\
 	(VMALLOC_START + \
-	 PTRS_PER_PGD * PTRS_PER_PMD * PTRS_PER_PTE * PAGE_SIZE - (1UL << 32))
+	 min(PTRS_PER_PGD * PTRS_PER_PMD * PTRS_PER_PTE * PAGE_SIZE, \
+	     (1UL << cpu_vmbits)) - (1UL << 32))
+
 #if defined(CONFIG_MODULES) && defined(KBUILD_64BIT_SYM32) && \
 	VMALLOC_START != CKSSEG
 /* Load modules into 32bit-compatible segment. */
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 7a51866..00d7124 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -282,6 +282,15 @@  static inline int __cpu_has_fpu(void)
 	return ((cpu_get_fpu_id() & 0xff00) != FPIR_IMP_NONE);
 }
 
+static inline void cpu_probe_vmbits(struct cpuinfo_mips *c)
+{
+#ifdef __NEED_VMBITS_PROBE
+	write_c0_entryhi(0x3ffffffffffff000ULL);
+	back_to_back_c0_hazard();
+	c->vmbits = fls64(read_c0_entryhi() & 0x3ffffffffffff000ULL);
+#endif
+}
+
 #define R4K_OPTS (MIPS_CPU_TLB | MIPS_CPU_4KEX | MIPS_CPU_4K_CACHE \
 		| MIPS_CPU_COUNTER)
 
@@ -967,6 +976,8 @@  __cpuinit void cpu_probe(void)
 		c->srsets = ((read_c0_srsctl() >> 26) & 0x0f) + 1;
 	else
 		c->srsets = 1;
+
+	cpu_probe_vmbits(c);
 }
 
 __cpuinit void cpu_report(void)