Patchwork [2/2] MIPS: fpu: fix conflict of register usage

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Submitter Huacai Chen
Date 2014-02-15 03:02:24
Message ID <1392477204-16238-2-git-send-email-chenhc@lemote.com>
Download mbox | patch
Permalink /patch/6551/
State Not Applicable
Delegated to: Ralf Baechle
Headers show

Comments

Huacai Chen - 2014-02-15 03:02:24
In _restore_fp_context/_restore_fp_context32, t0 is used for both
CP0_Status and CP1_FCSR. This is a mistake and cause FP exeception on
boot, so fix it.

Signed-off-by: Huacai Chen <chenhc@lemote.com>
---
 arch/mips/kernel/r4k_fpu.S |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)
Andi Barth - 2014-02-16 06:02:12
* Huacai Chen (chenhc@lemote.com) [140215 16:14]:
> In _restore_fp_context/_restore_fp_context32, t0 is used for both
> CP0_Status and CP1_FCSR. This is a mistake and cause FP exeception on
> boot, so fix it.

I can confirm that it fixes boot-up on loongson 3 too.

> Signed-off-by: Huacai Chen <chenhc@lemote.com>
Tested-by: Andreas Barth <aba@ayous.org>



Thanks,
Andi

Patch

diff --git a/arch/mips/kernel/r4k_fpu.S b/arch/mips/kernel/r4k_fpu.S
index 3ab26a5..c68ca61 100644
--- a/arch/mips/kernel/r4k_fpu.S
+++ b/arch/mips/kernel/r4k_fpu.S
@@ -147,7 +147,7 @@  LEAF(_save_fp_context32)
  *  - cp1 status/control register
  */
 LEAF(_restore_fp_context)
-	EX	lw t0, SC_FPC_CSR(a0)
+	EX	lw t1, SC_FPC_CSR(a0)
 
 #if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2)
 	.set	push
@@ -192,7 +192,7 @@  LEAF(_restore_fp_context)
 	EX	ldc1 $f26, SC_FPREGS+208(a0)
 	EX	ldc1 $f28, SC_FPREGS+224(a0)
 	EX	ldc1 $f30, SC_FPREGS+240(a0)
-	ctc1	t0, fcr31
+	ctc1	t1, fcr31
 	jr	ra
 	 li	v0, 0					# success
 	END(_restore_fp_context)
@@ -200,7 +200,7 @@  LEAF(_restore_fp_context)
 #ifdef CONFIG_MIPS32_COMPAT
 LEAF(_restore_fp_context32)
 	/* Restore an o32 sigcontext.  */
-	EX	lw t0, SC32_FPC_CSR(a0)
+	EX	lw t1, SC32_FPC_CSR(a0)
 
 	mfc0	t0, CP0_STATUS
 	sll	t0, t0, 5
@@ -240,7 +240,7 @@  LEAF(_restore_fp_context32)
 	EX	ldc1 $f26, SC32_FPREGS+208(a0)
 	EX	ldc1 $f28, SC32_FPREGS+224(a0)
 	EX	ldc1 $f30, SC32_FPREGS+240(a0)
-	ctc1	t0, fcr31
+	ctc1	t1, fcr31
 	jr	ra
 	 li	v0, 0					# success
 	END(_restore_fp_context32)